Guest MaLaChI Posted June 25, 2009 Share Posted June 25, 2009 Cu alte cuvinte: Care e tensiunea minima pe care CMOS-uri o discern ca 1 logic?Intreb din experienta practica. Am citit in datasheeturi. Dar vreau o parere a cuiva care lucreaza cu ele! Multumesc anticipat. Quote Link to comment Share on other sites More sharing options...
roadrunner Posted June 25, 2009 Share Posted June 25, 2009 depinde de tensiunea de alimentare, de proces, de temperatura si de geometria portii. E safe sa spui ca tot ce e peste VDD-30% e considerat 1 logic De exemplu la pinii unui FPGA Spartan3 (VCCIO 3.3V)LVCMOS33 - 2.0 (VIH)LVCMOS33 - 0.8 (VIH)la un ATmega88 Input High Voltage, exceptXTAL1 and RESET pinsVCC = 1.8V - 2.4V 0.7VCCVCC = 2.4V - 5.5V 0.6VCCcel mai bine te uiti in datasheet la circuitul cu pricina.RR Quote Link to comment Share on other sites More sharing options...
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